MFSK16

How MFSK16 is Received

The Receiver used in MFSK16 and related modes is probably the most major departure from conventional technology in the whole project. In early advanced MFSK designs such as Piccolo, the receiver used a series of high gain filters, virtually oscillators, which were reset and allowed to generate output that built up during the whole of the following symbol period. This technique leads to very narrow, very sensitive, and very robust receivers for each tone. The output with the greatest response at the end of the symbol period was considered to be the one representing the transmitted data.

The DSP equivalent of this "integrate and dump" technique is the Symbol-synchronous Fast Fourier Transform (FFT), used in such a way that the samples of received audio for the duration of each symbol generates an integrated output similar to the Piccolo integrate and dump technique. The FFT is an excellent way to simulate the integrate and dump filter because it has excellent filter response without ringing, accurate and very stable performance, and its pulse response is a good match for the transmitted data pulses. The outputs are also "soft", i.e. effectively analog numbers, and also contain phase information not available with the Piccolo analog hardware technique.

Let's look at the (much simplified!) block diagram of the MFSK16 receiver. See the top line of the picture down the page a little.

Anti-alias Filter

The audio from the receiver can contain energy up to several kHz, and to avoid problems with the higher frequency energy causing interference (like an "image" in a superhet receiver), the digitised audio from the sound card is passed through a low pass filter. This simple filter just averages several samples together, limiting the high frequency response. It has the further advantage that it reduces the sample rate from the 8000 / sec coming from the sound card to something more manageable. The IZ8BLY software uses two divide by two stages, so the output rate is 2000 samples/second. This process is often called "decimation".

Balanced Mixer

To bring the received signal into the correct range for the demodulator, the signal is frequency shifted, using a mixer as in a superhet receiver. In this case the mixer is a mathematical multiplier, multiplying the incoming samples with a stream of sinewave samples from a Numerically Controlled Oscillator (NCO). This is if you like the "VFO" of the receiver, and the values controlling its frequency are used by the transmitter as well. The NCO frequency is adjusted as the signal is tuned in, say using a waterfall display.

The mixer output is another stream of data samples. It will of course also contain image frequency data, but since the detector is not sensitive to this, the image does not matter.

FFT Filter / Demodulator

This is the heart of the receiver. A set of samples which represent all the energy received during one symbol is processed with a fast Fourier Transform (FFT), and the results consist of a table of energies measured at different frequencies. We call these different frequencies "bins".

In fact, the FFT is "windowed" by removing samples that could be in error at the beginning and end of each symbol. These errors are caused by timing variations in the ionosphere, which tend to be frequency selective, so it is very possible for one tone to run into another to some extent, even though they were transmitted one after another.

The number of samples and the speed at which the samples are taken define how many bins there will be, and how widely spaced they are. Bins outside the receiver range are simply ignored, but the central 8, 16 or 32 bins (16 bins in MFSK16, because it has 16 tones) are used to provide data for the data and phase decoders. Both amplitude and phase information is available.

Soft Decision Decoder

The output of the demodulator gives a measure of the power received in each bin, or receiver tone filter. It is the job of the Decision Decoder to work out which bin contains the energy of the current symbol, and therefore which bits of data were received. The simplest way is just to look at all the data and decide which one is biggest, and assign the answer to it.

However, since the signal can be mistuned, and can also contain significant ionospheric distortion, signal energy tends to spill over into adjacent bins. This reduces the sensitivity of the system, and of course increases the possibility of error. Tt is possible to weigh the data in a rather different way - each of the data bits expected in the output can potentially be received in half the bins if true, and in the other half if not true. Therefore if you add up the power in all the bins that might contain a tone representing that bit, and subtract the power received from all those that will not contain that bit, then the answer should have a better signal to noise ratio.

No matter which method is used, the output will contain a digital value representing the bits received, and an analog value representing their received strength. This information is valuable to the FEC decoder, and also to any signal strength meter. This is why we call it a "soft decision" decoder - it not only decides the data received, but gives a measure of the accuracy of the measurement.

De-Interleaver

Whenever FEC is used, it is normal to include an interleaver, to muddle up the data bits and so spread out the errors caused by burst noise. This makes the job of the FEC decoder easier. Of course the first thing to do with the received data is to un-muddle it, using the De-Interleaver, which is really just a shift register and a data selector, working with the same algorithm as was used in the transmitter.

An additional problem with the interleaver is that it needs to be synchronised with the data, so that it knows which bits to put in the correct order. Synchronising information can be added to the transmitted data, or synchronisation can be inferred by "trial and error", i.e. by seeing how well the FEC decoder copes with a guess, and trying a different guess if the performance is poor.

Both of these approaches are inefficient. In an MFSK mode there is a unique opportunity to provide self-synchronism, not available to other modes. The MFSK16 Interleaver is self-synchronising, because the receiver knows the incoming bit order, at least within each symbol, and it can exactly restore the correct order without outside help. See the Transmitter Description for details.

FEC Decoder

There are two main types of Convolutional Decoder - the sequential type, which uses a very long shift register, and the Viterbi type, which is potentially not as accurate, but is much faster because it throws away the solutions that have little chance of being right.

FEC decoding is much more complex than coding, and consists in effect of guessing the correct answer for every transmitted bit, and working out the history of that bit to see if the guess was viable. The Viterbi technique is very efficient at doing this. Coding experts have expended considerable effort to improve the performance of this highly complex technique.

The MFSK16 FEC Decoder is a soft decoder - in other words, it works with analog numbers, rather than binary bits. This adds a small but significant improvement to the performance, without any great extra processor load, since the highly efficient maths coprocessor is used. Utilising the analog numbers from the Soft Decision Decoder also adds a valuable performance improvement.

The output of the FEC decoder is a bit stream at half the input rate. The data is not perfect, especially if the received signal was very poor, but the number of errors is dramatically reduced. The data comes out of the FEC decoder in bursts, which is why the text appears on the screen a few characters at a time. If the length of the decoder is increased, the error reduction capabilities increase, but so also does the delay, and the output of the longer decoder decodes more characters at a time, but in slower bursts.

Varicode Decoder

The final stage in the receiver is to decode the bitstream, either direct from the Decision Decoder if no FEC was used, or from the FEC Decoder if it was. The decoder uses a Varicode table and an algorithm that inspects the data stream looking for inter-character gaps (transmitted as "00" in Varicode, and always followed by the first "1" of the next character), and then decodes the groups of bits according to the table. The result is text which is printed on the screen. The Varicode is similar to that used by PSK31, but can be slightly more efficient due to different idle character requirements.

Symbol Phase Decoder

The final step in the receiver is to recover the Symbol Clock, to ensure that the samples in the FFT decoder do represent only energy from one Symbol at a time. In older systems like Piccolo and Coquelet, this clock was transmitted separately, in much the same way as the clock is transmitted in PSK31. We decided to get away from this with MFSK16, as it would allow non-linear transmitters to be used with no decrease in the signal quality. So, instead of amplitude information, all the receiver has to rely on is the actual data, and the phase of the Symbols. There are several techniques that can be used.

Each individual receiver channel will contain occasional pulses of energy as a Symbol is received, and the transition between one channel and another will not occur at the correct point in the Symbol period if the receiver Symbol clock is incorrect. It is possible to detect these transitions and thus work out the error in the Symbol Clock phase, and thereby correct it.

It is also possible to analyse the shape of the pulses (once they have passed through the ionosphere and the receiver they are no longer square in shape) and determine from the shape where the symbols are. This is done using a 'sliding FFT" technique, where several FFT solutions are made in the time of one symbol. If the sum of the energy in all receiver channels is analysed, the characteristic shape is found and can be used to synchronise the Symbol Clock.

The MFSK16 signal is a continuous phase (CPFSK) transmission, where every symbol starts and ends at the same phase. Using the phase information from the FFT detector, it is possible to discover the error in the Symbol Clock because only when the Symbol Clock phase is correct will the phases of all the FFT detector outputs coincide. If the phase is incorrect, the individual buckets will contain energy of only partial symbols, and the phase is different for each bucket as the frequency is increased. The direction of change of phase per bucket can be used to deduce which way the Clock phase is in error.