The Minutes below should be considered a rough draft. - 3/26/92 Megan Ethernet MIB Working Group Meeting of 17 March 1992 IETF Meeting, San Diego, California Chairman: Frank Kastenholz The Ethernet MIB Working Group met at the San Diego IETF meeting on Tuesday, 17 March 1992. The Working Group reviewed the report on MIB variable implementation that had earlier been posted to the mailing list earlier (a copy is attached for the record).As a result of this review, the Working Group has decided to make the following changes to the MIB: 1) The dot3TestTdrValue object will be deprecated from the standard mib. There are effectively no implementations of this object, and some chips were reported to return an incorrect value for the TDR count. 2) The dot3StatsInRangeLengthErrors object and the dot3StatsOutOfRangeLengthFields object will be deprecated from the MIB. These objects were not widely implemented and their utility in diagnosing network problems was strongly questioned. 3) The dot3InitializeMac object, the dot3MacSubLayerStatus object, the dot3MulticastReceiveStatus object, and the dot3TxEnabled object will be deprecated from the MIB. These objects were not widely implemented and their utility in diagnosing network problems was strongly questioned. 4) The dot3StatsExcessiveDeferrals object will be deprecated from the MIB. Only one system implemented this object. Furthermore, its exact definition was called into question. 5) The dot3StatsSQETestErrors object received few implementations. However, the working group strongly supported its retention in the MIB on the basis that certain forms of transceiver and cable errors that are not uncommon can only be detected with this counter. 6) The collision histogram table (dot3CollTable) will be kept as an optional group, even though the objects are not widely implemented nor is there hardware support on all reported chips. The implementation data presented at the meeting is: MIB Implementation Variable 1 2 3 4 5 6 7 8 9 10 11 Yesses dot3InitializeMac C C Y Y Y Y Y C7 C7 N Y 6 dot3MacSubLayerStatus C C Y Y Y Y Y C7 C7 N C 5 dot3MulticastReceiveStatus C C Y C3 Y C C C7 C7 N C 2 dot3TxEnabled C C Y Y Y Y Y C7 C7 N C 5 dot3TestTdrValue C 1 C C4 C C C C4 C4 N C 1 dot3StatsAlignmentErrors Y Y Y Y Y Y Y Y Y Y Y 11 dot3StatsFCSErrors Y Y Y Y Y Y Y Y Y Y Y 11 dot3StatsSingleCollisionFrames Y Y Y N Y Y Y Y Y Y Y 10 dot3StatsMultipleCollisionFrames Y Y Y N Y Y Y Y Y Y Y 10 dot3StatsSQETestErrors Y C C C Y C C C C Y C 3 dot3StatsDeferredTransmissions Y C Y N Y Y Y Y Y Y Y 9 dot3StatsLateCollisions C Y Y Y Y Y Y Y Y Y Y 10 dot3StatsExcessiveCollisions Y Y Y Y Y Y Y Y Y Y Y 11 dot3StatsInternalMacTransmitErrors Y Y Y Y Y Y Y Y Y Y Y 11 dot3StatsCarrierSenseErrors Y C Y Y Y Y Y Y Y Y Y 10 dot3StatsExcessiveDeferrals C C Y C C C C C C N C 1 dot3StatsFrameTooLongs Y Y2 Y Y C Y Y Y Y Y Y 10 dot3StatsInRangeLengthErrors C C C N5 C Y Y C C N C 2 dot3StatsOutOfRangeLengthFields C C C C6 C C C C C N C 0 dot3StatsInternalMacReceiveErrors Y Y Y Y Y C C Y Y Y C 8 dot3CollCount Y Y C N N N N C C N Y 3 dot3CollFrequencies Y Y C N N N N C C N Y 3 Yesses 13 11 16 11 15 14 14 11 11 12 13 Y Fully implemented, reports a truthful count, or indication of state. All values may be written to the variable with the expected action occurring. N Not implemented at all. Would return a noSuchName error if accessed. C Implemented but returns a constant value for gets and returns a badValue error for any set attempt to set the variable to a value other than this constant (writable variables only). Notes: 1 does not implement TDR test, but reports TDR from last collision! 2 Not supported by the chip, detected solely in software. 3 But set to disabled(2) -> badValue 4 Underlying TDR function not implemented on this chip. 5 Only counts frames too short though. 6 Due to Ethernet encapsulation 7 Implementation does not support set operations but reports the correct value for these. Implementation Vendor Chip 1 1 Intel 82586 2 1 Fujitsu 86950 3 2 Sonic 4 3 AMD Lance 5 4 National NIC 8390C 6 4 Intel 82596 7 4 AMD Lance 8 5 AMD Lance 9 5 AMD ILACC 10 6 AMD Lance 11 7 Intel 82586